India and Japan Align Strategic Tech Policies on Semiconductors and AI

The arithmetic alone tells us where this is headed. India has committed roughly Rs 1,27,500 crore — about $13.25 billion — to the second phase of its semiconductor program, layered on top of Rs 1.6 lakh crore in investments already absorbed by ten approved projects under the first phase. That second wave, announced by Finance Minister Nirmala Sitharaman in the Union Budget 2026, repositions the India Semiconductor Mission (ISM) from a foundation-laying exercise into a full-spectrum value-chain play. We are watching a deliberate restructuring of incentives, not a subsidy program.

From Fab Politics to Value-Chain Architecture

ISM 1.0 focused on what every latecomer semiconductor economy must first establish: proof that capital can be deployed at scale. Two fabs, eight ATMP/OSAT units, roughly Rs 1.6 lakh crore in committed investment — these are the load-bearing walls. Without them, no serious conversation about design IP, equipment, or materials is possible. The policy architecture followed the standard sequence: build the floor before installing the machinery.

ISM 2.0, as ELE Times frames it, widens the aperture. Chip design IP, equipment and materials, advanced packaging, R&D, talent development — the second phase explicitly targets the layers that determine whether a country captures rents or merely hosts assembly. Amitesh Kumar Sinha, CEO of ISM, put the sequencing bluntly: ISM 1.0 laid the foundation; ISM 2.0 shifts focus to "deepening the value chain across materials, equipment, IP, and supply chain resilience." The Indian semiconductor market, currently in the $45–50 billion range and projected by ELE Times to reach $100–110 billion by 2030, is now being treated as both an end market and an industrial-policy instrument. That is the structural pivot.

The Japan Overlay

This is where the India-Japan economic security agenda reported by ET Government becomes legible. If ISM 2.0 is the domestic scaffolding, the bilateral track adds the strategic overlay: semiconductors, AI, and investment as the three named axes of the partnership. The available reporting gives us only the headline framing, not the granular mechanics — but the logic is straightforward and fits the global pattern. Japan brings process technology, materials expertise, and equipment-manufacturing depth. India brings scale, labor, and a domestic market large enough to anchor supply-chain diversification away from concentrated risk. Sinha's posture in the ELE Times piece — that ISM is "fully committed to facilitating and supporting" further investments and ready to serve as a "trusted, scalable, and globally competitive" ecosystem — is the correct diplomatic register for this phase.

What We Should Be Watching

Three structural fault lines will determine whether the architecture coheres or fragments.

Execution velocity on the value chain. ISM 1.0 succeeded at project approval. ISM 2.0 will be judged on whether design IP, equipment, and advanced packaging actually localize, rather than remaining import-dependent layers wrapped around Indian-assembled chips. National semiconductor strategies live or die in this transition.

Partner selection discipline. The invitation is broad — Singapore is mentioned in the ELE Times reporting as a potential value-chain participant, alongside Japan and others. The risk is ceremonial announcement density. Capability transfer compounds only when partnerships are sequenced, technical, and binding.

The talent constraint. R&D and talent development are explicitly named pillars of ISM 2.0. Engineering talent is abundant; the binding constraint is specialized process engineering and design expertise at production-relevant scale. Without it, the value-chain deepening remains aspiration.

We have seen enough semiconductor national strategies to know that the gap between announcement and output is where most of them fail. India has, to its credit, cleared the first two phases of that gap. ISM 2.0 now sits squarely in the execution window.